Basys 3 basic LED flasher

Image credit: Digilent

This project is a very basic and simple project. Four of the board LEDs are blinked using a counter. The position of switch 0 makes the blinking faster or slower.

For an introduction to the Basys3 board, check here.

library ieee;
use ieee.std_logic_1164.all;
use ieee.numeric_std.all;
use ieee.std_logic_unsigned.all;

entity top is
	
  port (
		CLK: 		  in std_logic;
		
		-- inputs
		SW: 		  in std_logic_vector(0 downto 0);
		
		-- outputs
		LED:      out std_logic_vector (3 downto 0)
	);
end top;


architecture rtl of top is
	signal counter_reg : std_logic_vector (28 downto 0);

begin 

  counter_pr: process (CLK) 
  begin 
    if (rising_edge(CLK)) then
      counter_reg <= counter_reg - 1;	-- decrement counter
    end if;
  end process counter_pr;

  LED <= counter_reg(28 downto 25) when SW(0) = '0' else
         counter_reg(26 downto 23);

end rtl;

For this project, I have used the std_logic_unsigned library. In this way, we don’t have to explicitly declare counter_reg as unsigned. This makes the code less verbose, but be careful not to use this library if your VHDL entity has a mix of signed and unsigned signals.

The process on line 25 just decrements count_reg all the time. When it reaches zero it will wrap around to “all ones” and start decrementing again.

The LEDs are assigned the most significant bits of the counter. The value assigned (line 32) depends on the position of SW(0).

The size of the counter is chosen according to the value of the input CLK, which on the Basys 3 is 100MHz. To get a time base of 1 pulse per second, we make log₂(100 *10⁶) and we get 26.5. So the counter so the slower blinking LED will change once in about a second for the fastest setting, and a bit slower when the switch is moved to ‘0’.

The source file and constraints file for this project can be found on GitHub.