Introduction to Verilog

The motto of this blog is “FPGA projects in VHDL”. It also includes free VHDL books. But, in a past comment on Hacker News, I saw this nice Verilog short guide and I knew I have to share it here.

Besides, the FPGA world is evolving. In my experience, it is not enough to know one manufacturer. You may need more. Nor it is enough to know only VHDL. You’d better know also Verilog. And even start thinking to learn other resources and tools, like HLS.

So, now that I have finished (more or less) publishing this link, here it is.

The short, 32-page guide includes the following subjects:

  • Gate-Level Modelling
  • Data Types
  • Operators
  • Operands
  • Modules
  • Behavioral Modeling
  • Functions
  • Component Inference
  • Finite State Machines
  • Compiler Directives
  • System Tasks and Functions
  • Test Benches, and
  • Memories

This short and useful Introduction to Verilog is published by Carleton University

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